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1 lt1182/lt1183/lt1184/lt1184f ccfl/lcd contrast switching regulators n wide input voltage range: 3v to 30v n low quiescent current n high switching frequency: 200khz n ccfl switch : 1.25a, lcd switch: 625ma n grounded or floating lamp configurations n open-lamp protection n positive or negative contrast capability features descriptio n u applicatio n s u the lt ? 1182/lt1183 are dual current mode switching regulators that provide the control function for cold cath- ode fluorescent lighting (ccfl) and liquid crystal display (lcd) contrast. the lt1184/lt1184f provide only the ccfl function. the ics include high current, high efficiency switches, an oscillator, a reference, output drive logic, control blocks and protection circuitry. the lt1182 per- mits positive or negative voltage lcd contrast operation. the lt1183 permits unipolar contrast operation and pins out an internal reference. the lt1182/lt1183 support grounded and floating lamp configurations. the lt1184f supports grounded and floating lamp configurations. the lt1184 supports only grounded lamp configurations. the n notebook and palmtop computers n portable instruments n automotive displays n retail terminals 90% efficient floating ccfl configuration with dual polarity lcd contrast typical applicatio n u , ltc and lt are registered trademarks of linear technology corporation. c12 2.2 m f 35v bat 8v to 28v poscon negcon 1182/3 ta01 either negcon or poscon must be grounded. grounding negcon gives variable positive contrast from 10v to 30v. grounding poscon gives variable negative contrast from ?0v to 30v. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i ccfl dio ccfl v c agnd shdn lcd v c ccfl v sw bulb bat royer v in fbp fbn lcd v sw ccfl pgnd lcd pgnd lt1182 lamp up to 6ma 10 6 l1 l3 r1 750 w l2 100 m h 3 21 5 4 + + + aluminum electrolytic is recommended for c3b with an esr 3 0.5 w to prevent damage to the lt1182 high-side sense resistor due to surge currents at turn-on. c7, 1 m f c1* 0.068 m f d1 1n5818 d2 1n914 d4 1n914 v (pwm) 0v to 5v 1khz pwm shutdown c8, 0.68 m f r7, 10k c5 1000pf r2 220k r3 100k c3a 2.2 m f 35v c11 22 m f 35v r13 8.45k 1% r14 1.21k 1% 5v r10, 10k, 1% r9, 4.99k, 1% c4 2.2 m f v in 3 3v d3 1n5934a 24v c3b 2.2 m f 35v c2 27pf 3kv + c1 must be a low loss capacitor, c1 = wima mkp-20 q1, q2 = zetex ztx849 or rohm 2sc5001 l1 = coiltronics ctx210605 l2 = coiltronics ctx100-4 l3 = coiltronics ctx02-12403 * do not substitute components coiltronics (407) 241-7876 q2* q1* n = 1:2 0 m a to 45 m a iccfl current gives 0ma to 6ma bulb current. this is equal to 0% to 90% duty cycle for the pwm signal. r12 20k r5, 43.2k, 1% c6 2.2 m f r4 46.4k 1% + d5 bat85 c10 0.01 m f r11, 20k, 1% c9, 0.01 m f 2 4 6 9 + ccfl backlight application circuits contained in this data sheet are covered by u.s. patent number 5408162 and other patents pending
2 lt1182/lt1183/lt1184/lt1184f descriptio n u current. an active low shutdown pin typically reduces total supply current to 35 m a for standby operation. a 200khz switching frequency minimizes the size of required mag- netic components. the use of current mode switching techniques with cycle-by-cycle limiting gives high reliabil- ity and simple loop frequency compensation. the lt1182/ lt1183/lt1184/lt1184f are all available in 16-pin nar- row so packages. lt1184/lt1184f pin out the reference for simplified pro- gramming of lamp current. the lt1182/lt1183/lt1184/lt1184f operate with input supply voltages from 3v to 30v. the ics also have a battery supply voltage pin that operates from 4.5v to 30v. the lt1182/lt1183 draw 9ma typical quiescent current while the lt1184/lt1184f draw 6ma typical quiescent v in , bat, royer, bulb .............................................. 30v ccfl v sw , lcd v sw ............................................... 60v shutdown ................................................................. 6v i ccfl input current .............................................. 10ma dio input current (peak, < 100ms) .................... 100ma lt1182: fbp, fbn, lt1183: fb pin current ......... 2ma absolute m axi m u m ratings w ww u package/order i n for m atio n w u u t jmax = 100 c, q ja = 100 c/w t jmax = 100 c, q ja = 100 c/w consult factory for industrial and military grade parts lt1183cs order part number t jmax = 100 c, q ja = 100 c/w t jmax = 100 c, q ja = 100 c/w LT1182CS order part number lt1184cs order part number lt1184fcs lt1183/lt1184/1184f: ref pin source current .... 1ma junction temperature (note 1) ............................ 100 c operating ambient temperature range ..... 0 c to 100 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c order part number top view s package 16-lead plastic so ccfl pgnd i ccfl dio ccfl v c agnd shutdown lcd v c lcd pgnd ccfl v sw bulb bat royer v in fbp fbn lcd v sw 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view s package 16-lead plastic so ccfl pgnd i ccfl dio ccfl v c agnd shutdown nc nc ccfl v sw bulb bat nc v in ref nc nc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view s package 16-lead plastic so ccfl pgnd i ccfl dio ccfl v c agnd shutdown lcd v c lcd pgnd ccfl v sw bulb bat royer v in ref fb lcd v sw 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view s package 16-lead plastic so ccfl pgnd i ccfl dio ccfl v c agnd shutdown nc nc ccfl v sw bulb bat royer v in ref nc nc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
3 lt1182/lt1183/lt1184/lt1184f symbol parameter conditions min typ max units i q supply current lt1182/lt1183: 3v v in 30v l 914 ma lt1184/lt1184f: 3v v in 30v l 6 9.5 ma i shdn shutdown supply current shutdown = 0v, ccfl v c = lcd v c = open (note 2) 35 70 m a shutdown input bias current shutdown = 0v, ccfl v c = lcd v c = open 3 6 m a shutdown threshold voltage l 0.6 0.85 1.2 v f switching frequency measured at ccfl v sw and lcd v sw , i sw = 50ma, 175 200 225 khz i ccfl = 100 m a, ccfl v c = open, (lt1182) fbn = fbp = 1v, (lt1183) fb = 1v, (lt1182/lt1183) lcd v c = open l 160 200 240 khz dc(max) maximum switch duty cycle measured at ccfl v sw and lcd v sw 80 85 % l 75 85 % bv switch breakdown voltage measured at ccfl v sw and lcd v sw 60 70 v switch leakage current v sw = 12v, measured at ccfl v sw and lcd v sw 20 m a v sw = 30v, measured at ccfl v sw and lcd v sw 40 m a i ccfl summing voltage 3v v in 30v, measured on lt1182/lt1183 0.41 0.45 0.49 v l 0.37 0.45 0.54 v 3v v in 30v, measured on lt1184/lt1184f 0.425 0.465 0.505 v l 0.385 0.465 0.555 v d i ccfl summing voltage for i ccfl = 0 m a to 100 m a 5 15 mv d input programming current ccfl v c offset sink current ccfl v c = 1.5v, positive current measured into pin C5 5 15 m a d ccfl v c source current for i ccfl = 25 m a, 50 m a, 75 m a, 100 m a, l 4.70 4.95 5.20 m a/ m a d i ccfl programming current ccfl v c = 1.5v ccfl v c to dio current servo ratio dio = 5ma out of pin, measure i vc at ccfl v c = 1.5v l 94 99 104 m a/ma ccfl v c low clamp voltage v bat C v bulb = bulb protect servo voltage l 0.1 0.3 v ccfl v c high clamp voltage i ccfl = 100 m a l 1.7 2.1 2.4 v ccfl v c switching threshold ccfl v sw dc = 0% l 0.6 0.95 1.3 v ccfl high-side sense servo current i ccfl = 100 m a, i vc = 0 m a at ccfl v c = 1.5v l 0.93 1.00 1.07 a ccfl high-side sense servo current bat = 5v to 30v, i ccfl = 100 m a, 0.1 0.16 %/v line regulation i vc = 0 m a at ccfl v c = 1.5v ccfl high-side sense supply current current measured into bat and royer pins l 50 100 150 m a bulb protect servo voltage i ccfl = 100 m a, i vc = 0 m a at ccfl v c = 1.5v, l 6.5 7.0 7.5 v servo voltage measured between bat and bulb pins bulb input bias current i ccfl = 100 m a, i vc = 0 m a at ccfl v c = 1.5v 5 9 m a i lim1 ccfl switch current limit duty cycle = 50% l 1.25 1.9 3.0 a duty cycle = 75% (note 3) l 0.9 1.6 2.6 a v sat1 ccfl switch on-resistance ccfl i sw = 1a l 0.6 1.0 w d i q supply current increase during ccfl i sw = 1a 20 30 ma/a d i sw1 ccfl switch on-time v ref reference voltage measured at ref (pin 11) on lt1183/lt1184/lt1184f 1.224 1.244 1.264 v l 1.214 1.244 1.274 v reference output impedance measured at ref (pin 11) on lt1183 l 20 45 70 w measured at ref (pin 11) on lt1184/lt1184f l 51530 w electrical characteristics t a = 25 c, v in = 5v, bat = royer = bulb = 12v, i ccfl = shutdown = ccfl v sw = open, dio = gnd, ccfl v c = 0.5v, (lt1182/lt1183) lcd v c = 0.5v, lcd v sw = open, (lt1182) fbn = fbp = gnd, (lt1183) fb = gnd, (lt1183/lt1184/lt1184f) ref = open, unless otherwise specified.
4 lt1182/lt1183/lt1184/lt1184f electrical characteristics symbol parameter conditions min typ max units v ref C i ccfl summing voltage measured on lt1183 0.760 0.795 0.830 v l 0.725 0.795 0.865 v v ref C i ccfl summing voltage measured on lt1184/lt1184f 0.740 0.775 0.810 v l 0.705 0.775 0.845 v ref1 lcd fbp/fb reference voltage lt1182: measured at fbp pin, fbn = 1v, lcd v c = 0.8v 1.224 1.244 1.264 v lt1183: measured at fb pin, lcd v c = 0.8v l 1.214 1.244 1.274 v ref1 voltage line regulation 3v v in 30v, lcd v c = 0.8v l 0.01 0.03 %/v fbp/fb input bias current lt1182: fbp = ref1, fbn = 1v, lcd v c = 0.8v lt1183: fb = ref1, lcd v c = 0.8v l 0.35 1.0 m a lcd fbn/fb offset voltage lt1182: measured at fbn pin, fbp = 0v, lcd v c = 0.8v C 20 C 12 C 4 mv lt1183: measured at fb pin, lcd v c = 0.8v l C27 C12 C1 mv offset voltage line regulation 3v v in 30v, lcd v c = 0.8v l 0.01 0.2 %/v fbn/fb input bias current lt1182: fbn = offset voltage, fbp = 0v, lcd v c = 0.8v lt1183: fb = offset voltage, lcd v c = 0.8v l C 3.0 C 1.0 m a g m fbp/fb to lcd v c transconductance lt1182: d i vc = 25 m a, fbn = 1v 650 900 1150 m mhos lt1183: d i vc = 25 m a l 500 900 1300 m mhos fbn/fb to lcd v c transconductance lt1182: d i vc = 25 m a, fbp = gnd 550 800 1050 m mhos lt1183: d i vc = 25 m a l 400 800 1200 m mhos lcd error amplifier source current lt1182: fbp = fbn = 1v or 0.25v, l 50 100 175 m a lt1183: fb = 1v or 0.25v lcd error amplifier sink current lt1182: fbp = fbn = 1.5v or C 0.25v, l 35 100 175 m a lt1183: fb = 1.5v or C 0.25v lcd v c low clamp voltage lt1182: fbp = fbn = 1.5v, lt1183: fb = 1.5v 0.01 0.3 v lcd v c high clamp voltage lt1182: fbp = fbn = 1v, lt1183: fb = 1v 1.7 2.0 2.4 v lcd v c switching threshold lt1182: fbp = fbn = 1v, lt1183: fb = 1v, v sw dc = 0% 0.6 0.95 1.3 v i lim2 lcd switch current limit duty cycle = 50% l 0.625 1.00 1.5 a duty cycle = 75% (note 3) l 0.400 0.85 1.3 a v sat2 lcd switch on-resistance lcd i sw = 0.5a l 1.0 1.65 w d i q supply current increase during lcd i sw = 0.5a 20 30 ma/a d i sw2 lcd switch on-time switch minimum on-time measured at ccfl v sw and lcd v sw 0.45 m s t a = 25 c, v in = 5v, bat = royer = bulb = 12v, i ccfl = shutdown = ccfl v sw = open, dio = gnd, ccfl v c = 0.5v, (lt1182/lt1183) lcd v c = 0.5v, lcd v sw = open, (lt1182) fbn = fbp = gnd, (lt1183) fb = gnd, (lt1183/lt1184/lt1184f) ref = open, unless otherwise specified. the l denotes specifications which apply over the specified operating temperature range. note 1: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formula: LT1182CS/lt1183cs/lt1184cs/lt1184fcs: t j = t a + (p d 100 c/w) note 2: does not include switch leakage. note 3: for duty cycles (dc) between 50% and 75%, minimum guaranteed switch current is given by i lim = 1.4(1.393 C dc) for the ccfl regulator and i lim = 0.7(1.393 C dc ) for the lcd contrast regulator due to internal slope compensation circuitry.
5 lt1182/lt1183/lt1184/lt1184f temperature ( c) ?5 lcd duty cycle (%) 87 91 95 93 89 85 81 77 125 150 lt1182 ?g09 83 79 75 ?5 0 ?0 25 50 75 100 175 temperature ( c) ?5 ccfl duty cycle (%) 87 91 95 93 89 85 81 77 125 150 lt1182 ?g07 83 79 75 ?5 0 ?0 25 50 75 100 175 typical perfor m a n ce characteristics u w lt1184/lt1184f supply current vs temperature lt1182/lt1183 supply current vs temperature shutdown input bias current vs temperature temperature ( c) 0 shutdown input bias current ( m a) 2 4 6 5 3 1 25 25 75 125 lt1182 g04 175 ?0 ?5 0 50 100 150 v in = 5v v in = 3v v in = 30v shutdown threshold voltage vs temperature temperature ( c) 0.6 shutdown threshold voltage (v) 0.8 1.0 1.2 1.1 0.9 0.7 25 25 75 125 lt1182 g05 175 ?0 ?5 0 50 100 150 temperature ( c) ?5 ccfl frequency (khz) 220 240 125 lt1182 ?g06 200 180 160 ?5 25 75 175 210 230 190 170 100 ?0 0 50 150 v in = 30v v in = 3v ccfl frequency vs temperature lcd duty cycle vs temperature lcd frequency vs temperature ccfl duty cycle vs temperature shutdown current vs temperature temperature ( c) ?5 supply current (ma) 10 12 14 13 11 9 7 5 125 lt1182 g01 8 6 4 ?5 50 0 50 100 150 25 75 175 v in = 30v v in = 3v temperature ( c) ?5 shutdown current ( m a) 60 8o 100 90 70 50 30 10 125 lt1182 g03 40 20 0 ?5 50 0 50 100 150 25 75 175 v in = 30v v in = 5v v in = 3v temperature ( c) ?5 supply current (ma) 6 8 10 9 7 5 3 1 125 lt1182 g02 4 2 0 ?5 50 0 50 100 150 25 75 175 v in = 30v v in = 3v temperature ( c) ?5 lcd frequency (khz) 220 240 125 lt1182 ?g08 200 180 160 ?5 25 75 175 210 230 190 170 100 ?0 0 50 150 v in = 3v v in = 30v
6 lt1182/lt1183/lt1184/lt1184f typical perfor m a n ce characteristics u w i ccfl summing voltage vs temperature temperature ( c) i ccfl summing voltage (v) 0.53 0.52 0.51 0.50 0.49 0.48 0.47 0.46 0.45 0.44 0.43 0.42 0.41 0.40 0.39 0.38 25 25 75 125 lt1182 ?g10 175 ?0 ?5 0 50 100 150 v in = 5v v in = 3v v in = 30v d ccfl v c source current for d i ccfl programming current vs temperature ccfl v c to dio current servo ratio vs temperature i ccfl programming current ( m a) 5 4 3 2 1 0 ? ? ? ? ? ? ? ? ? ?0 40 80 120 160 lt1182 ?g11 200 20 0 60 100 140 180 t = 55 c t = 25 c t = 125 c d i ccfl summing voltage (mv) temperature ( c) ? ccfl v c sink offset current ( m a) ? 1 0 ? 10 9 6 8 7 5 3 2 4 ?5 125 150 ?5 0 ?0 25 50 75 100 175 ccfl v c = 0.5v ccfl v c = 1.0v ccfl v c = 1.5v lt1182 ?g12 temperature ( c) 0 positive dio voltage (v) 0.4 0.2 0.8 0.6 1.2 1.0 25 25 75 125 lt1182 ?g14 175 ?0 ?5 0 50 100 150 i(dio) = 1ma i(dio) = 5ma i(dio) = 10ma positive dio voltage vs temperature negative dio voltage vs temperature ccfl v c high clamp voltage vs temperature ccfl v c low clamp voltage vs temperature temperature ( c) 0 ccfl v c low clamp voltage (v) 0.10 0.05 0.20 0.15 0.30 0.25 ?5 25 75 125 lt1182 ?g17 175 ?0 ?5 0 50 100 150 i ccfl summing voltage load regulation ccfl v c offset sink current vs temperature temperature ( c) ?5 1.7 ccfl v c high clamp voltage (v) 1.8 2.0 2.1 2.2 2.4 ?0 50 100 lt1182 ?g18 1.9 2.3 25 150 175 ?5 0 75 125 temperature ( c) 4.80 d ccfl v c source current for d i ccfl programming current ( m a/ m a) 4.90 4.85 5.00 4.95 5.10 5.05 25 25 75 125 lt1182 ?g13 175 ?0 ?5 0 50 100 150 i ccfl = 10 m a i ccfl = 50 m a i ccfl = 100 m a temperature ( c) ?5 ccfl v c dio current servo ratio ( m a/ma) 101 103 125 lt1182 ?g16 99 97 95 25 25 75 175 100 102 98 96 100 ?0 0 50 150 i(dio) = 1ma i(dio) = 5ma i(dio) = 10ma temperature ( c) ?5 negative dio voltage (v) 1.2 1.6 125 lt1182 ?g15 0.8 0.4 0 ?5 25 75 175 1.0 1.4 0.6 0.2 100 ?0 0 50 150 i(dio) = 1ma i(dio) = 5ma i(dio) = 10ma
7 lt1182/lt1183/lt1184/lt1184f typical perfor m a n ce characteristics u w ccfl v c switching threshold voltage vs temperature temperature ( c) ?5 0.6 ccfl v c switching threshold voltage (v) 0.7 0.9 1.0 1.1 1.3 ?0 50 100 lt1182 ?g19 0.8 1.2 25 150 175 ?5 0 75 125 lcd v c low clamp voltage vs temperature temperature ( c) ?0 ?5 0 lcd v c low clamp voltage (v) 0.10 0.03 0.04 0.05 1.00 0.07 0 50 75 lt1182 ?g20 0.02 0.08 0.09 0.06 ?5 25 100 125 lcd v c high clamp voltage vs temperature temperature ( c) ?5 1.7 ldc v c high clamp voltage (v) 1.8 2.0 2.1 2.2 2.4 ?0 50 100 lt1182 ?g21 1.9 2.3 25 150 175 ?5 0 75 125 lcd v c switching threshold voltage vs temperature temperature ( c) ?5 0.6 ldc v c switching threshold voltage (v) 0.7 0.9 1.0 1.1 1.3 ?0 50 100 lt1182 ?g22 0.8 1.2 25 150 175 ?5 0 75 125 ccfl high-side sense null current vs temperature temperature ( c) 0.940 ccfl high-side sense null current (a) 0.980 0.960 1.020 1.000 1.060 1.040 ?5 25 75 125 lt1182 ?g23 175 ?0 ?5 0 50 100 150 ccfl high-side sense null current line regulation vs temperature temperature ( c) ?5 ccfl high-side sense line regulati0n (%v) 0.120 0.160 125 lt1182 ?g24 0.080 0.040 0.000 25 25 75 175 0.100 0.140 0.060 0.020 100 ?0 0 50 150 temperature ( c) ?5 ccfl high-side sense supply current ( m a) 110 130 150 140 120 100 80 60 125 150 lt1182 ?g25 90 70 50 ?5 0 ?0 25 50 75 100 175 ccfl high-side sense supply current vs temperature bulb protect servo voltage vs temperature temperature ( c) ?5 bulb protect servo voltage (v) 7.1 7.3 7.5 7.4 7.2 7.0 6.8 6.6 125 150 lt1182 ?g26 6.9 6.7 6.5 ?5 0 ?0 25 50 75 100 175 i ccfl = 10 m a i ccfl = 50 m a i ccfl = 100 m a bulb input bias current vs temperature temperature ( c) bulb input bias current ( m a) 6 8 10 lt1182 ?g27 4 2 0 ?5 125 150 ?5 0 ?0 25 50 75 100 175
8 lt1182/lt1183/lt1184/lt1184f typical perfor m a n ce characteristics u w fbp input bias current vs temperature fbp to lcd v c transconductance vs temperature lcd fbp reference vs temperature temperature ( c) 1.214 lcd fbp reference voltage (v) 1.234 1.224 1.254 1.244 1.274 1.264 25 25 75 125 lt1182 ?g28 175 ?0 ?5 0 50 100 150 temperature ( c) ?5 fbp input bias current ( m a) 0.6 0.8 1.0 0.9 0.7 0.5 0.3 0.1 125 150 lt1182 ?g30 0.4 0.2 0 ?5 0 ?0 25 50 75 100 175 lcd fbn offset voltage vs temperature temperature ( c) ?7 lcd fbn offset voltage (mv) ?3 ?9 ?1 ?5 ? ? ? ? ? ?1 ?5 ?7 ?3 75 125 150 ?5 0 ?0 25 50 75 100 175 fbn to lcd v c transconductance vs temperature lt1184/84f ref output impedance vs temperature temperature ( c) ?5 fbn to lcd v c transconductance ( m mhos) 1000 1200 125 lt1182 ?g34 800 600 400 25 25 75 175 900 1100 700 500 100 ?0 0 50 150 temperature ( c) ?5 fbp to lcd v c transconductance ( m mhos) 1100 1300 125 lt1182 ?g33 900 700 500 25 25 75 175 1000 1200 800 600 100 ?0 0 50 150 temperature ( c) 0 fbp reference voltage line regulation (%/v) 0.010 0.005 0.020 0.015 0.03 0.025 25 25 75 125 lt1182 ?g29 175 ?0 ?5 0 50 100 150 fbp reference voltage line regulation vs temperature lt1183 ref output impedance vs temperature temperature ( c) ?5 lt1183 ref 0utput impedance ( w ) 50 60 70 65 55 45 35 25 125 150 lt1182 ?g35 40 30 20 ?5 0 ?0 25 50 75 100 175 temperature ( c) lt1184/84f ref output impedance ( w ) 20 25 30 lt1182 ?g36 15 10 5 ?5 125 150 ?5 0 ?0 25 50 75 100 175 fbn input bias current vs temperature temperature ( c) 0 fbn input bias current ( m a) 1.0 0.5 2.0 1.5 3.0 2.5 25 25 75 125 lt1182 ?g32 175 ?0 ?5 0 50 100 150
9 lt1182/lt1183/lt1184/lt1184f typical perfor m a n ce characteristics u w ccfl v sw current limit vs duty cycle ccfl v sw sat voltage vs switch current switch current (a) 0 ccfl v sw sat voltage (v) 0.6 0.8 1.0 1.2 lt1182 ?g37 0.4 0.2 0.5 0.7 0.9 0.3 0.1 0 0.3 0.6 0.9 1.5 t = 5 c t = 125 c t = 25 c duty cycle (%) 0 0 ccfl v sw current limit (a) 0.5 1.5 2.0 2.5 20 40 50 90 lt1182 ?g39 1.0 10 30 60 70 80 t = 25 c t = 125 c minimum t = 0 c lcd v sw sat voltage vs switch current switch current (a) 0 lcd vsw sat voltage (v) 1.2 1.6 2.0 1.2 lt1182 ?g38 0.8 0.4 0 0.3 0.6 0.9 1.5 t = 5 c t = 125 c t = 25 c duty cycle (%) 0 0 lcd v sw current limit (a) 0.3 0.9 1.2 1.5 20 40 50 90 lt1182 ?g40 0.6 10 30 60 70 80 t = 25 c t = 125 c minimum t = 0 c lcd v sw current limit vs duty cycle forced beta vs i sw on ccfl v sw ccfl i sw (a) 0 forced beta 60 80 110 100 1.6 lt1182 ?g41 40 20 50 70 90 30 10 0 0.4 0.8 1.2 0.2 1.8 0.6 1.0 1.4 2.0 lcd i sw (a) 0 forced beta 60 80 100 1.6 lt1182 ?g42 40 20 50 70 90 30 10 0 0.4 0.8 1.2 0.2 1.8 0.6 1.0 1.4 2.0 forced beta vs i sw on lcd v sw
10 lt1182/lt1183/lt1184/lt1184f lt1182/lt1183/lt1184/lt1184f ccfl pgnd (pin 1): this pin is the emitter of an internal npn power switch. ccfl switch current flows through this pin and permits internal, switch-current sensing. the regulators provide a separate analog ground and power ground(s) to isolate high current ground paths from low current signal paths. linear technology recommends the use of star-ground layout techniques. i ccfl (pin 2): this pin is the input to the ccfl lamp current programming circuit. this pin internally regulates to 450mv (lt1182/lt1183) or 465mv (lt1184/lt1184f). the pin accepts a dc input current signal of 0 m a to 100 m a full scale. this input signal is converted to a 0 m a to 500 m a source current at the ccfl v c pin. by shunt regulating the i ccfl pin, the input programming current can be set with dac, pwm or potentiometer control. as input program- ming current increases, the regulated lamp current in- creases. for a typical 6ma lamp, the range of input programming current is about 0 m a to 50 m a. dio (pin 3): this pin is the common connection between the cathode and anode of two internal diodes. the remain- ing terminals of the two diodes connect to ground. in a grounded lamp configuration, dio connects to the low voltage side of the lamp. bidirectional lamp current flows in the dio pin and thus the diodes conduct alternately on half cycles. lamp current is controlled by monitoring one- half of the average lamp current. the diode conducting on negative half cycles has one-tenth of its current diverted to the ccfl v c pin. this current nulls against the source current provided by the lamp-current programmer circuit. a single capacitor on the ccfl v c pin provides both stable loop compensation and an averaging function to the half- wave-rectified sinusoidal lamp current. therefore, input programming current relates to one-half of average lamp current. this scheme reduces the number of loop com- pensation components and permits faster loop transient response in comparison to previously published circuits. if a floating-lamp configuration is used, ground the dio pin. ccfl v c (pin 4): this pin is the output of the lamp current programmer circuit and the input of the current compara- tor for the ccfl regulator. its uses include frequency compensation, lamp-current averaging for grounded lamp circuits, and current limiting. the voltage on the ccfl v c pin determines the current trip level for switch turnoff. during normal operation this pin sits at a voltage between 0.95v (zero switch current) and 2.0v (maximum switch current) with respect to analog ground (agnd). this pin has a high impedance output and permits external voltage clamping to adjust current limit. a single capacitor to ground provides stable loop compensation. this simpli- fied loop compensation method permits the ccfl regula- tor to exhibit single-pole transient response behavior and virtually eliminates transformer output overshoot. agnd (pin 5): this pin is the low current analog ground. it is the negative sense terminal for the internal 1.24v reference and the i ccfl summing voltage in the lt1182/ lt1183/lt1184/lt1184f. it is also a sense terminal for the lcd dual input error amplifier in the lt1182/lt1183. connect external feedback divider networks that terminate to ground and frequency compensation components that terminate to ground directly to this pin for best regulation and performance. shutdown (pin 6): pulling this pin low causes complete regulator shutdown with quiescent current typically re- duced to 35 m a. the nominal threshold voltage for this pin is 0.85v. if the pin is not used, it can float high or be pulled to a logic high level (maximum of 6v). carefully evaluate active operation when allowing the pin to float high. capacitive coupling into the pin from switching transients could cause erratic operation. ccfl v sw (pin 16): this pin is the collector of the internal npn power switch for the ccfl regulator. the power switch provides a minimum of 1.25a. maximum switch current is a function of duty cycle as internal slope com- pensation ensures stability with duty cycles greater than 50%. using a driver loop to automatically adapt base drive current to the minimum required to keep the switch in a quasi-saturation state yields fast switching times and high efficiency operation. the ratio of switch current to driver current is about 50:1. pi n fu n ctio n s uuu
11 lt1182/lt1183/lt1184/lt1184f bulb (pin 15): this pin connects to the low side of a 7v threshold comparator between the bat and bulb pins. this circuit sets the maximum voltage level across the primary side of the royer converter under all operating conditions and limits the maximum secondary output under start-up conditions or open lamp conditions. this eases transformer voltage rating requirements. set the voltage limit to insure lamp start-up with worst-case, lamp start voltages and cold-temperature system operating conditions. the bulb pin connects to the junction of an external divider network. the divider network connects from the center tap of the royer transformer or the actual battery supply voltage to the top side of the current source tail inductor. a capacitor across the top of the divider network filters switching ripple and sets a time constant that determines how quickly the clamp activates. when the comparator activates, sink current is generated to pull the ccfl v c pin down. this action transfers the entire regulator loop from current mode operation into voltage mode operation. bat (pin 14): this pin connects to the battery or battery charger voltage from which the ccfl royer converter and lcd contrast converter operate. this voltage is typically higher than the v in supply voltage but can be equal or less than v in . however, the bat voltage must be at least 2.1v greater than the internal 2.4v regulator or 4.5v minimum up to 30v maximum. this pin provides biasing for the lamp current programming block, is used with the royer pin for floating lamp configurations, and connects to one input for the open lamp protection circuitry. for floating lamp configurations, this pin is the noninverting terminal of a high-side current sense amplifier. the typical quies- cent current is 50 m a into the pin. the bat and royer pins monitor the primary side royer converter current through an internal 0.1 w top side current sense resistor. a 0a to 1a primary side, center tap converter current is translated to an input signal range of 0mv to 100mv for the current sense amplifier. this input range translates to a 0 m a to 500 m a sink current at the ccfl v c pin that nulls against the source current provided by the programmer circuit. the bat pin also connects to the top side of an internal clamp between the bat and bulb pins. pi n fu n ctio n s uuu royer (pin 13): this pin connects to the center-tapped primary of the royer converter and is used with the bat pin in a floating lamp configuration where lamp current is controlled by sensing royer primary side converter cur- rent. this pin is the inverting terminal of a high-side current sense amplifier. the typical quiescent current is 50 m a into the pin. if the ccfl regulator is not used in a floating lamp configuration, tie the royer and bat pins together. this pin is only available on the lt1182/lt1183/ lt1184f. v in (pin 12): this pin is the supply pin for the lt1182/ lt1183/lt1184/lt1184f. the ics accept an input voltage range of 3v minimum to 30v maximum with little change in quiescent current (zero switch current). an internal, low dropout regulator provides a 2.4v supply for most of the internal circuitry. supply current increases as switch current increases at a rate approximately 1/50 of switch current. this corresponds to a forced beta of 50 for each switch. the ics incorporate undervoltage lockout by sens- ing regulator dropout and lockout switching for input voltages below 2.5v. hysteresis is not used to maximize the useful range of input voltage. the typical input voltage is a 3.3v or 5v logic supply. lt1182/lt1183 lcd v c (pin 7): this pin is the output of the lcd contrast error amplifier and the input of the current comparator for the lcd contrast regulator. its uses include frequency compensation and current limiting. the voltage on the lcd v c pin determines the current trip level for switch turnoff. during normal operation, this pin sits at a voltage between 0.95v (zero switch current) and 2.0v (maximum switch current). the lcd v c pin has a high impedance output and permits external voltage clamping to adjust current limit. a series r/c network to ground provides stable loop compensation. lcd pgnd (pin 8): this pin is the emitter of an internal npn power switch. lcd contrast switch current flows through this pin and permits internal, switch-current sensing. the regulators provide a separate analog ground and power ground(s) to isolate high current ground paths from low current signal paths. linear technology recom- mends star-ground layout techniques.
12 lt1182/lt1183/lt1184/lt1184f pi n fu n ctio n s uuu lcd v sw (pin 9): this pin is the collector of the internal npn power switch for the lcd contrast regulator. the power switch provides a minimum of 625ma. maximum switch current is a function of duty cycle as internal slope compensation ensures stability with duty cycles greater than 50%. using a driver loop to automatically adapt base drive current to the minimum required to keep the switch in a quasi-saturation state yields fast switching times and high efficiency operation. the ratio of switch current to driver current is about 50:1. lt1182 fbn (pin 10): this pin is the noninverting terminal for the negative contrast control error amplifier. the inverting terminal is offset from ground by C12mv and defines the error amplifier output state under start-up conditions. the fbn pin acts as a summing junction for a resistor divider network. input bias current for this pin is typically 1 m a flowing out of the pin. if this pin is not used, force fbn to greater than 0.5v to deactivate the negative contrast control input stage. the proximity of fbn to the lcd v sw pin makes it sensitive to ringing on the switch pin. a small capacitor (0.01 m f) from fbn to ground filters switching ripple. fbp (pin 11): this pin is the inverting terminal for the positive contrast control error amplifier. the noninverting terminal is tied to an internal 1.244v reference. input bias current for this pin is typically 0.5 m a flowing into the pin. if this pin is not used, ground fbp to deactivate the positive contrast control input stage. the proximity of fbp to the lcd v sw pin makes it sensitive to ringing on the switch pin. a small capacitor (0.01 m f) from fbp to ground filters switching ripple. lt1183 fb (pin 10): this pin is the common connection between the noninverting terminal for the negative contrast error amplifier and the inverting terminal for the positive-con- trast error amplifier. in comparison to the lt1182, the fbn and the fbp pins tie together and come out as one pin. this scheme permits one polarity of contrast to be regulated. the proximity of fb to the lcd v sw pin makes it sensitive to ringing on the switch pin. a small capacitor (0.01 m f) from fb to ground filters switching ripple. the fb pin requires attention to start-up conditions when generating negative contrast voltages. the pin has two stable operating points; regulating to 1.244v for positive contrast voltages or regulating to C12mv for negative contrast voltages. under start-up conditions, the fb pin heads to a positive voltage. if negative contrast voltages are generated, tie a diode from the fb pin to ground. this ensures that the fb pin will clamp before reaching the positive reference voltage. switching action then pulls the fb pin back to its normal servo voltage. lt1183/lt1184/lt1184f ref (pin 11): this pin brings out the 1.244v reference. its functions include the programming of negative contrast voltages with an external resistor divider network (lt1183 only) and the programming of lamp current for the i ccfl pin. ltc does not recommend using the ref pin for both functions at once. the ref pin has a typical output impedance of 45 w on the lt1183 and a typical output impedance of 15 w on the lt1184/lt1184f. reference load current should be limited to a few hundred microam- peres, otherwise reference regulation will be degraded. ref is used to generate the maximum programming current for the i ccfl pin by placing a resistor between the pins. pwm or dac control subtracts from the maximum programming current. a small decoupling capacitor (0.1uf) is recommended to filter switching transients.
13 lt1182/lt1183/lt1184/lt1184f block diagra m w lt1182/lt1183 ccfl/lcd contrast regulator top level block diagram fbn 10 + i lim amp2 comp2 comp1 under- voltage lockout thermal shutdown 2.4v regulator shutdown 200khz osc drive 2 shutdown 9 6 lcd v sw lcd pgnd lcd v c fbp i ccfl agnd dio bulb ccfl v c ccfl pgnd ccfl v sw royer bat v in logic 2 anti- sat2 logic 1 drive 1 lcd gain = 4.4 gain = 4.4 q3 2 q5 1 q4 5 q8 1 q10 2 r1 0.125 w r4 0.1 w lt1183: fbp and fbn are tied together to create fb at pin 10. the reference is brought out to pin 11. r2 0.25 w q6 2 r3 1k d2 6v d1 q11 q1 q2 13 14 12 q7 9 q9 3 8 7 11 25 3 15 4 16 1 v2 1.24v v1 0.45v + ccfl 0 m a to 100 m a ?2mv + g m ++ + i lim amp1 anti- sat1 1182 bd01 +
14 lt1182/lt1183/lt1184/lt1184f block diagra m w lt1184/lt1184f ccfl regulator top level block diagram comp1 under- voltage lockout thermal shutdown 2.4v regulator shutdown 200khz osc shutdown 6 ref i ccfl agnd dio bulb ccfl v c ccfl pgnd ccfl v sw royer bat v in logic 1 drive 1 gain = 4.4 q3 2 q5 1 q4 5 q8 1 q10 2 r1 0.125 w r4 0.1 w lt1184/lt1184f: reference is brought out to pin 1. pins 7, 8, 9, 10 are no connect. q6 2 r3 1k d2 6v d1 q11 q1 13 14 12 q7 9 q9 3 11 25 3 15 4 16 1 v ref 1.24v v1 0.465v + ccfl 0 m a to 100 m a + g m + i lim amp1 anti- sat1 1184 bd02 lt1184: high-side sense resistor r4 and gm amplifier are removed. pin 13 is no connect. applicatio n s i n for m atio n wu u u introduction current generation portable computers and instruments use backlit liquid crystal displays (lcds). these displays also appear in applications extending to medical equip- ment, automobiles, gas pumps, and retail terminals. cold cathode fluorescent lamps (ccfls) provide the highest available efficiency in backlighting the display. providing the most light out for the least amount of input power is the most important goal. these lamps require high voltage ac to operate, mandating an efficient high voltage dc/ac converter. the lamps operate from dc, but migration effects damage the lamp and shorten its lifetime. lamp drive should contain zero dc component. in addition to good efficiency, the converter should deliver the lamp drive in the form of a sine wave. this minimizes emi and rf emissions. such emissions can interfere with other devices and can also degrade overall operating efficiency. sinusoidal ccfl drive maximizes current-to-light conver- sion in the lamp. the circuit should also permit lamp intensity control from zero to full brightness with no hysteresis or pop-on.
15 lt1182/lt1183/lt1184/lt1184f applicatio n s i n for m atio n wu u u manufacturers offer a wide array of monochrome and color displays. lcd display types include passive matrix and active matrix. these displays differ in operating volt- age polarity (positive and negative contrast voltage dis- plays), operating voltage range, contrast adjust range, and power consumption. lcd contrast supplies must regu- late, provide output adjustment over a significant range, operate over a wide input voltage range, and provide load currents from milliamps to tens of milliamps. the small size and battery-powered operation associated with lcd equipped apparatus dictate low component count and high efficiency for these circuits. size con- straints place severe limitations on circuit architecture and long battery life is a priority. laptop and handheld portable computers offer an excellent example. the ccfl and its power supply are responsible for almost 50% of the battery drain. displays found in newer color machines can have a contrast power supply battery drain as high as 20%. additionally, all components including pc board and hard- ware, usually must fit within the lcd enclosure with a height restriction of 5mm to 10mm. the ccfl switching regulator in the lt1182/lt1183/ lt1184/lt1184f typically drives an inductor that acts as a switched mode current source for a current driven royer class converter with efficiencies as high as 90%. the control loop forces the regulator to pulse-width modulate the inductors average current to maintain constant cur- rent in the lamp. the constant currents value, and thus lamp intensity is programmable. this drive technique provides a wide range of intensity control. a unique lamp current programming block permits either grounded- lamp or floating-lamp configurations. grounded-lamp cir- cuits directly control one-half of actual lamp current. floating-lamp circuits directly control the royers primary side converter current. floating-lamp circuits provide differential drive to the lamp and reduce the loss from stray lamp-to-frame capacitance, extending illumination range. the lcd contrast switching regulator in the lt1182/ lt1183 is typically configured as a flyback converter and generates a bias supply for contrast control. other topol- ogy choices for generating the bias supply include a boost converter or a boost/charge pump converter. the supplys variable output permits adjustment of contrast for the majority of available displays. some newer types of dis- plays require a fairly constant supply voltage and provide contrast adjustment through a digital control pin. a unique, dual polarity, error amplifier and the selection of a flyback converter topology allow either positive or negative lcd contrast voltages to be generated with minor circuit changes. the difference between the lt1182 and lt1183 is found in the pinout for the inputs of the lcd contrast error amplifier. the lt1182 brings out the error amplifier inputs individually for setting up positive and negative polarity contrast capability. this feature allows an output connector to determine the choice of contrast operating polarity by a ground connection. the lt1183 ties the error amplifier inputs together and brings out an internal refer- ence. the reference may be used in generating negative contrast voltages or in programming lamp current. block diagram operation the lt1182/lt1183/lt1184/lt1184f are fixed frequency, current mode switching regulators. fixed frequency, cur- rent mode switchers control switch duty cycle directly by switch current rather than by output voltage. referring to the block diagram for the lt1182/lt1183, the switch for each regulator turns on at the start of each oscillator cycle. the switches turn off when switch current reaches a predetermined level. the operation of the ccfl regulator in the lt1184/lt1184f is identical to that in the lt1182/ lt1183. the control of output lamp current is obtained by using the output of a unique programming block to set current trip level. the contrast voltage is controlled by the output of a dual-input-stage error amplifier, which sets current trip level. the current mode switching technique has several advantages. first, it provides excellent rejec- tion of input voltage variations. second, it reduces the 90 phase shift at mid-frequencies in the energy storage inductor. this simplifies closed-loop frequency compen- sation under widely varying input voltage or output load conditions. finally, it allows simple pulse-by-pulse cur- rent limiting to provide maximum switch protection under output overload or short-circuit conditions. the lt1182/lt1183/lt1184/lt1184f incorporate a low dropout internal regulator that provides a 2.4v supply for most of the internal circuitry. this low dropout design allows input voltage to vary from 3v to 30v with little
16 lt1182/lt1183/lt1184/lt1184f change in quiescent current. an active low shutdown pin typically reduces total supply current to 35 m a by shutting off the 2.4v regulator and locking out switching action for standby operation. the ics incorporate undervoltage lock- out by sensing regulator dropout and locking out switch- ing below about 2.5v. the regulators also provide thermal shutdown protection that locks out switching in the pres- ence of excessive junction temperatures. a 200khz oscillator is the basic clock for all internal timing. the oscillator turns on an output via its own logic and driver circuitry. adaptive anti-sat circuitry detects the onset of saturation in a power switch and adjusts base drive current instantaneously to limit switch saturation. this minimizes driver dissipation and provides rapid turn- off of the switch. the ccfl power switch is guaranteed to provide a minimum of 1.25a in the lt1182/lt1183/ lt1184/lt1184f and the lcd power switch is guaranteed to provide a minimum of 0.625a in the lt1182/lt1183. the anti-sat circuitry provides a ratio of switch current to driver current of about 50:1. simplified lamp current programming a programming block in the lt1182/lt1183/lt1184/ lt1184f controls lamp current, permitting either grounded- lamp or floating-lamp configurations. grounded configu- rations control lamp current by directly controlling one- half of actual lamp current and converting it to a feedback signal to close a control loop. floating configurations control lamp current by directly controlling the royers primary side converter current and generating a feedback signal to close a control loop. previous backlighting solutions have used a traditional error amplifier in the control loop to regulate lamp current. this approach converted an rms current into a dc voltage for the input of the error amplifier. this approach used several time constants in order to provide stable loop frequency compensation. this compensation scheme meant that the loop had to be fairly slow and that output overshoot with startup or overload conditions had to be carefully evaluated in terms of transformer stress and breakdown voltage requirements. the lt1182/lt1183/lt1184/lt1184f eliminate the error amplifier concept entirely and replace it with a lamp current programming block. this block provides an easy- to-use interface to program lamp current. the program- mer circuit also reduces the number of time constants in the control loop by combining the error signal conversion scheme and frequency compensation into a single capaci- tor. the control loop thus exhibits the response of a single pole system, allows for faster loop transient response and virtually eliminates overshoot under startup or overload conditions. lamp current is programmed at the input of the program- mer block, the i ccfl pin. this pin is the input of a shunt regulator and accepts a dc input current signal of 0 m a to 100 m a. this input signal is converted to a 0 m a to 500ua source current at the ccfl v c pin. the programmer circuit is simply a current-to-current converter with a gain of five. by regulating the i ccfl pin, the input programming current can be set with dac, pwm or potentiometer control. the typical input current programming range for 0ma to 6ma lamp current is 0 m a to 50 m a. the i ccfl pin is sensitive to capacitive loading and will oscillate with capacitance greater than 10pf. for example, loading the i ccfl pin with a 1 or 10 scope probe causes oscillation and erratic ccfl regulator operation because of the probes respective input capacitance. a current meter in series with the i ccfl pin will also produce oscil- lation due to its shunt capacitance. use a decoupling resistor of several kilo-ohms between the i ccfl pin and the control circuitry if excessive stray capacitance exists. this is basically free with potentiometer or pwm control as these control schemes use resistors. a current output dac should use an isolating resistor as the dac can have significant output capacitance that changes as a function of input code. grounded-lamp configuration in a grounded-lamp configuration, the low voltage side of the lamp connects directly to the lt1182/lt1183/lt1184/ lt1184f dio pin. this pin is the common connection between the cathode and anode of two internal diodes. in previous grounded-lamp solutions, these diodes were discrete units and are now integrated onto the ic, saving cost and board space. bi-directional lamp current flows in the dio pin and thus, the diodes conduct alternately on half applicatio n s i n for m atio n wu u u
17 lt1182/lt1183/lt1184/lt1184f cycles. lamp current is controlled by monitoring one-half of the average lamp current. the diode conducting on negative half cycles has one-tenth of its current diverted to the ccfl pin and nulls against the source current provided by the lamp current programmer circuit. the compensa- tion capacitor on the ccfl v c pin provides stable loop compensation and an averaging function to the rectified sinusoidal lamp current. therefore, input programming current relates to one-half of average lamp current. the transfer function between lamp current and input programming current must be empirically determined and is dependent on the particular lamp/display housing com- bination used. the lamp and display housing are a distrib- uted loss structure due to parasitic lamp-to-frame capaci- tance. this means that the current flowing at the high voltage side of the lamp is higher than what is flowing at the dio pin side of the lamp. the input programming current is set to control lamp current at the high voltage side of the lamp, even though the feedback signal is the lamp current at the bottom of the lamp. this insures that the lamp is not overdriven which can degrade the lamps operating lifetime. floating-lamp configuration in a floating-lamp configuration, the lamp is fully floating with no galvanic connection to ground. this allows the transformer to provide symmetric, differential drive to the lamp. balanced drive eliminates the field imbalance asso- ciated with parasitic lamp-to-frame capacitance and re- duces thermometering (uneven lamp intensity along the lamp length) at low lamp currents. carefully evaluate display designs in relation to the physi- cal layout of the lamp, it leads and the construction of the display housing. parasitic capacitance from any high voltage point to dc or ac ground creates paths for unwanted current flow. this parasitic current flow de- grades electrical efficiency and losses up to 25% have been observed in practice. as an example, at a royer operating frequency of 60khz, 1pf of stray capacitance represents an impedance of 2.65m w . with an operating lamp voltage of 400v and an operating lamp current of 6ma, the parasitic current is 150 m a. the efficiency loss is 2.5%. layout techniques that increase parasitic capaci- tance include long high voltage lamp leads, reflective metal foil around the lamp, and displays supplied in metal enclosures. losses for a good display are under 5% whereas losses for a bad display range from 5% to 25%. lossy displays are the primary reason to use a floating- lamp configuration. providing symmetric, differential drive to the lamp reduces the total parasitic loss by one-half. maintaining closed-loop control of lamp current in a floating lamp configuration now necessitates deriving a feedback signal from the primary side of the royer trans- former. previous solutions have used an external preci- sion shunt and high side sense amplifier configuration. this approach has been integrated onto the lt1182/ lt1183/lt1184f for simplicity of design and ease of use. an internal 0.1w resistor monitors the royer converter current and connects between the input terminals of a high-side sense amplifier. a 0a to 1a royer primary side, center tap current is translated to a 0 m a to 500ua sink current at the ccfl v c pin to null against the source current provided by the lamp current programmer circuit. the compensation capacitor on the ccfl v c pin provides stable loop compensation and an averaging function to the error sink current. therefore, input programming current is related to average royer converter current. floating- lamp circuits operate similarly to grounded-lamp circuits, except for the derivation of the feedback signal. the transfer function between primary side converter current and input programming current must be empiri- cally determined and is dependent upon a myriad of factors including lamp characteristics, display construc- tion, transformer turns ratio, and the tuning of the royer oscillator. once again, lamp current will be slightly higher at one end of the lamp and input programming current should be set for this higher level to insure that the lamp is not overdriven. the internal 0.1 w high-side sense resistor on the lt1182/ lt1183/lt1184f is rated for a maximum dc current of 1a. however, this resistor can be damaged by extremely high surge currents at start-up. the royer converter typically uses a few microfarads of bypass capacitance at the center tap of the transformer. this capacitor charges up when the system is first powered by the battery pack or an ac wall adapter. the amount of current delivered at start-up can be applicatio n s i n for m atio n wu u u
18 lt1182/lt1183/lt1184/lt1184f very large if the total impedance in this path is small and the voltage source has high current capability. linear technology recommends the use of an aluminum electro- lytic for the transformer center tap bypass capacitor with an esr greater than or equal to 0.5 w . this lowers the peak surge currents to an acceptable level. in general, the wire and trace inductance in this path also help reduce the di/ dt of the surge current. this issue only exists with floating lamp circuits as grounded-lamp circuits do not make use of the high-side sense resistor. optimizing optical efficiency vs electrical efficiency evaluating the performance of an lcd backlight requires the measurement of both electrical and photometric effi- ciencies. the best optical efficiency operating point does not necessarily correspond to the best electrical effi- ciency. however, these two operating points are generally close. the desired goal is to maximize the amount of light out for the least amount of input power. it is possible to construct backlight circuits that operate with over 90% electrical efficiency, but produce significantly less light output than circuits that operate at 80% electrical effi- ciency. the best electrical efficiency typically occurs just as the ccfls transformer drive waveforms begin to exhibit artifacts of higher order harmonics reflected back from the royer transformer secondary. maximizing electrical effi- ciency equates to smaller values for the royer primary side, resonating capacitor and larger values for the royer secondary side ballast capacitor. the best optical effi- ciency occurs with nearly ideal sinusoidal drive to the lamp. maximizing optical efficiency equates to larger values for the royer primary side resonating capacitor and smaller values for the royer secondary side ballast capaci- tor. the preferred operating point for the ccfl converter is somewhere in between the best electrical efficiency and the best optical efficiency. this operating point maximizes photometric output per watt of input power. making accurate and repeatable measurements of electri- cal and optical efficiency is difficult under the best circum- stances. requirements include high voltage measure- ments and equipment specified for this operation, special- ized calibrated voltage and current probes, wideband rms voltmeters, a photometer, and a calorimeter (for the backlight enthusiast). linear technologys application note 55 and design note 101 contain detailed information regarding equipment needs. input supply voltage operating range the backlight/lcd contrast control circuits must operate over a wide range of input supply voltage and provide excellent line regulation for the lamp current and the contrast output voltage. this range includes the normal range of the battery pack itself as well as the ac wall adapter voltage, which is normally much higher than the maximum battery voltage. a typical input supply is 7v to 28v; a 4 to 1 supply range. operation of the ccfl control circuitry from the ac wall adapter generates the worst-case stress for the ccfl transformer. evaluations of loop compensation for over- shoot on startup transients and overload conditions are essential to avoid destructive arcing, overheating, and transformer failure. open-lamp conditions force the royer converter to operate open-loop. component stress is again worst-case with maximum input voltage conditions. the lt1182/lt1183/lt1184/lt1184f open-lamp pro- tection clamps the maximum transformer secondary volt- age to safe levels and transfers the regulator loop from current mode operation into voltage mode operation. other fault conditions include board shorts and compo- nent failures. these fault conditions can increase primary side currents to very high levels, especially at maximum input voltage conditions. solutions to these fault condi- tions include electrical and thermal fuses in the supply voltage trace. improvements in battery technology are increasing bat- tery lifetimes and decreasing battery voltages required by the portable systems. however, operation at reduced battery voltages requires higher, turns-ratio transformers for the ccfl to generate equivalent output drive capability. the penalty incurred with high ratio transformers is higher, circulating currents acting on the same primary side components. loss terms increase and electrical efficiency often decreases. applicatio n s i n for m atio n wu u u
19 lt1182/lt1183/lt1184/lt1184f size constraints tighter length, width, and height constraints for ccfl and lcd contrast control circuitry are the result of lcd display enclosure sizes remaining fairly constant while display screen sizes have increased. space requirements for connector hardware include the input power supply and control signal connector, the lamp connector, and the contrast output voltage connector. even though size requirements are shrinking, the high voltage ac required to drive the lamp has not decreased. in some cases, the use of longer bulbs for color, portable equipment has increased the high voltage requirement. accommodating the high voltage on the circuit board dictates certain layout spacings and routings, involves providing creepages and clearances in the transformer design, and most importantly, involves routing a hole underneath the ccfl transformer. routing this hole mini- mizes high voltage leakage paths and prevents moisture buildup that can result in destructive arcing. in addition to high voltage layout techniques, use appropriate layout techniques for isolating high current paths from low- current signal paths. this leaves the remaining space for control circuitry at a premium. minimum component count is required and minimum size for the components used is required. this squeeze on component size is often in direct conflict with the goals of maximizing battery life and efficiency. com- promise is often the only remaining choice. lcd contrast circuits the lcd contrast switching regulator on the lt1182/ lt1183 operates in many standard switching configura- tions and is used as a classic dc/dc converter. the dual- input-stage error amplifier easily regulates either positive or negative contrast voltages. topology choices for the converter include single inductor and transformer-based solutions. the switching regulator operates equally well either in continuous mode or discontinuous mode. effi- ciencies for lcd contrast circuits range from 75% to 85% and depend on the total power drain of the particular display. adjustment control of the lcd contrast voltage is provided by either potentiometer, pwm, or dac control. applications support linear technology invests an enormous amount of time, resources, and technical expertise in understanding, de- signing and evaluating backlight/lcd contrast solutions for system designers. the design of an efficient and compact lcd backlight system is a study of compromise in a transduced electronic system. every aspect of the design is interrelated and any design change requires complete re-evaluation for all other critical design param- eters. linear technology has engineered one of the most complete test and evaluation setups for backlight designs and understands the issues and tradeoffs in achieving a compact, effficient and economical customer solution. linear technology welcomes the opportunity to discuss, design, evaluate, and optimize any backlight/lcd contrast system with a customer. for further information on back- light/lcd contrast designs, consult the references listed below. references 1. williams, jim. august 1992. illumination circuitry for liquid crystal displays . linear technology corporation, application note 49. 2. williams, jim. august 1993. techniques for 92% effi- cient lcd illumination . linear technology corporation, application note 55. 3. bonte, anthony. march 1995. lt1182 floating ccfl with dual polarity contrast . linear technology corpora- tion, design note 99. 4. williams, jim. april 1995. a precision wideband cur- rent probe for lcd backlight meaasurement . linear tech- nology corporation, design note 101. applicatio n s i n for m atio n wu u u
20 lt1182/lt1183/lt1184/lt1184f typical applicatio n s n u 90% efficient grounded ccfl configuration with negative polarity lcd contrast bat 8v to 28v negcon 1182 ta02 varying the v(contrast) voltage from 0v to 5v gives variable negative contrast from ?0v to ?0v 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i ccfl dio ccfl v c agnd shdn lcd v c ccfl v sw bulb bat royer v in ref fb lcd v sw ccfl pgnd lcd pgnd lt1183 lamp up to 6ma 10 6 l1 l3 r1 750 w l2 100 m h 3 214 5 + c12 2.2 m f 35v + + c7, 1 m f c1* 0.068 m f d1 1n5818 d5 bat85 d2 1n914 d4 1n914 v (pwm) 0v to 5v 1khz pwm shutdown c8,0.68 m f r7, 10k r4 38.3k 1% c5 1000pf r2 220k r3 100k c3a 2.2 m f 35v c11 22 m f 35v v (contrast) 0v to 5v r11 40.2k 1% r10, 10k, 1% c4 2.2 m f v in 3 3v d3 1n5934a 24v c3b 2.2 m f 35v c2 27pf 3kv + c1 must be a low loss capacitor, c1 = wima mkp-20 q1, q2 = zetex ztx849 or rohm 2sc5001 l1 = coiltronics ctx210605 l2 = coiltronics ctx100-4 l3 = coiltronics ctx02-12403 * do not substitute components coiltronics (407) 241-7876 the i ccfl current required for an rms bulb current is: i ccfl (9 10 ? ) (i bulb ). 0% to 90% duty cycle for the pwm signal corresponds to 0 to 6ma. q2* q1* n = 1:2 c6 2.2 m f r5,38.3k, 1% r9, 4.99k, 1% d5 1n4148 c10 0.1 m f 6 4 29 c9 0.01 m f + +
21 lt1182/lt1183/lt1184/lt1184f typical applicatio n s n u lt1184f floating ccfl with potentiometer control of lamp current 16 15 14 13 12 11 10 9 bat 8v to 28v 1 2 3 4 5 6 7 8 i ccfl dio ccfl v c agnd shdn nc ccfl v sw bulb bat royer v in ref nc ccfl pgnd nc lt1184f lamp up to 6ma 10 6 l1 r1 750 w l2 100 m h 3 21 5 4 + + aluminum electrolytic is recommended for c3b with an esr 3 0.5 w to prevent damage to the lt1184f high-side sense resistor due to surge currents at turn-on. c7, 1 m f c1* 0.068 m f d1 1n5818 c5 1000pf r2 220k r3 100k c3a 2.2 m f 35v c4 2.2 m f 1182 ta03 v in 3 3v c3b 2.2 m f 35v c2 27pf 3kv + c1 must be a low loss capacitor, c1 = wima mkp-20 q1, q2 = zetex ztx849 or rohm 2sc5001 l1 = coiltronics ctx210605 l2 = coiltronics ctx100-4 * do not substitute components coiltronics (407) 241-7876 q2* q1* shutdown 0 m a to 45 m a i ccfl current gives 0ma to 6ma lamp current for a typical display. r5 50k 10 turn r4 15.4k 1% d5 bat85 nc
22 lt1182/lt1183/lt1184/lt1184f typical applicatio n s n u r2 40.5k 1182 ta04 1182 ta05 1182 ta08 1182 ta09 1182 ta10 1182 ta06 1182 ta07 1182 ta12 c1 2.2 m f r1 40.5k + to i ccfl pin lt1182/lt1183 i ccfl pwm programming lt1183 i ccfl pwm programming with v ref lt1184/lt1184f i ccfl pwm programming lt1183 i ccfl programming with potentiometer control r1 and r2 are ideal values. use nearest 1% value. r2 40.35k c1 2.2 m f r1 40.35k + to i ccfl pin r1 and r2 are ideal values. use nearest 1% value. + from v ref to i ccfl pin q1 vn2222l r1 330 w r2 7.15k r3 7.15k c1 22 m f r1 prevents oscillation. r2 and r3 are ideal values. use nearest 1% value. from v ref to i ccfl pin q1 vn2222l r1 3.57k r2 3.57k r3 7.15k c1 22 m f v (pwm) 0v to 5v 1khz pwm 10 to 100% dc = 50 m a to 0 m a r1, r2 and r3 are ideal values. use nearest 1% value. + v ref r2 50k r1 15.9k to i ccfl pin r1 and r2 are ideal values. use nearest 1% value. i ccfl = 12 m a to 50 m a. lt1184/lt1184f i ccfl programming with potentiometer control lt1182/lt1183/lt1184/lt1184f i ccfl programming with dac control v ref r2 50k r1 15.5k to i ccfl pin r1 and r2 are ideal values. use nearest 1% value. i ccfl = 12 m a to 50 m a. lt1184/lt1184f i ccfl pwm programming with v ref lt1183 i ccfl pwm programming with v ref + from v ref to i ccfl pin q1 vn2222l r1 330 w r2 6.98k r3 6.98k c1 22 m f v (pwm) 0v to 5v 1khz pwm 0% to 90% dc = 0 m a to 50 m a v (pwm) 0v to 5v 1khz pwm 0% to 90% dc = 0 m a to 50 m a v (pwm) 0v to 5v 1khz pwm 0% to 90% dc = 0 m a to 50 m a v (pwm) 0v to 5v 1khz pwm 0% to 90% dc = 0 m a to 50 m a r1 prevents oscillation. r2 and r3 are ideal values. use nearest 1% value. 1182 ta11 from v ref to i ccfl pin q1 vn2222l r1 3.48k r2 3.48k r3 6.98k c1 22 m f v (pwm) 0v to 5v 1khz pwm 10 to 100% dc = 50 m a to 0 m a r1, r2 and r3 are ideal values. use nearest 1% value. + lt1184/lt1184f i ccfl pwm programming with v ref dac r1 5k to i ccfl pin r1 decouples the dac output capacitance from the i ccfl pin. stray output capacitance current source dac
23 lt1182/lt1183/lt1184/lt1184f typical applicatio n s n u lt1182 lcd contrast positive boost converter c13 2.2 m f 35v bat 8v to 28v poscon v out 3 v in 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i ccfl dio ccfl v c agnd shdn lcd v c ccfl v sw bulb bat royer v in fbp fbn lcd v sw ccfl pgnd lcd pgnd lt1182 + c8 0.068 m f r7 33k r13 8.45k 1% r14 1.21k 1% c4 2.2 m f v in 3 3v r12 20k + c10 0.01 m f l3 50 m h coiltronics ctx50-4 d5 1n914 + c11 22 m f 35v 1182 ta12 lt1182 lcd contrast positive boost/charge pump converter c13 2.2 m f 35v bat 8v to 28v poscon v out 3 v in 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i ccfl dio ccfl v c agnd shdn lcd v c ccfl v sw bulb bat royer v in fbp fbn lcd v sw ccfl pgnd lcd pgnd lt1182 + c8 0.068 m f r7 33k r13 8.45k 1% r14 1.21k 1% c4 2.2 m f v in 3 3v r12 20k + c10 0.01 m f 1182 ta13 l3 50 m h coiltronics ctx50-4 d4 1n914 c11 22 m f 35v d5 1n914 + + c11 22 m f 35v information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
24 lt1182/lt1183/lt1184/lt1184f typical applicatio n s n u linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7487 (408) 432-1900 l fax : (408) 434-0507 l telex : 499-3977 lt/gp 0495 10k ? printed in usa ? linear technology corporation 1995 lt1182 lcd contrast positive to negative/charge pump converter c13 2.2 m f 35v bat 8v to 28v negcon |v out | 3 v in 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 i ccfl dio ccfl v c agnd shdn lcd v c ccfl v sw bulb bat royer v in fbp fbn lcd v sw ccfl pgnd lcd pgnd lt1182 + c8 0.068 m f r7 33k 5v r10 10k 1% r9 4.99k 1% c4 2.2 m f v in 3 3v + r11 20k 1% c9 0.01 m f l3 ctx50-4 coiltronics ctx50-4 d4 1n914 c11 22 m f 35v d5 1n914 + + c11 22 m f 35v 1182 ta14 part number frequency switch current description lt1107 63khz 1a micropower dc/dc converter for lcd contrast control hysteretic lt1172 100khz 1.25a current mode switching regulator for ccfl or lcd contrast control lt1173 24khz 1a micropower dc/dc converter for lcd contrast control hysteretic lt1186 200khz 1.25a ccfl switching regulator with dac for bits to brightness control lt1372 500khz 1.5a current mode switching regulator for ccfl or lcd contrast control dimensions in inches (millimeters) unless otherwise noted. package descriptio n u 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.006 inch (0.15mm). 1 2 3 4 5 6 7 8 0.150 ?0.157* (3.810 ?3.988) 16 15 14 13 0.386 ?0.394* (9.804 ?10.008) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ s package 16-lead plastic soic related parts

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